DocumentCode :
3053680
Title :
Board Level Reliability of Wafer Level Chip Scale Packages With Copper Post Technology
Author :
Jacobe, April B. ; Lomibao, Pinky B. ; Jackson, John
Author_Institution :
Analog Devices, Inc., Gen. Trias
fYear :
2007
fDate :
8-10 Nov. 2007
Firstpage :
155
Lastpage :
161
Abstract :
Thermal cycling performance of wafer level chip scale packages (WLCSP) depends on many factors: board design, assembly process and bump processes. The typical failure mode observed for this package is fracture between die and solder bump interface. To strengthen the base of the solder ball during thermal cycling, electroplated copper post was embedded on the RDL and is encapsulated in a low stress molding compound. The post increases the standoff which is believed to have better reliability. Time-to-failure, plotted in a Weibull distribution will be used to illustrate interesting and significant differences.
Keywords :
Weibull distribution; chip scale packaging; integrated circuit reliability; wafer level packaging; Weibull distribution; assembly process; board design; board level reliability; bump processes; copper post technology; electroplated copper post; low stress molding compound; solder ball; solder bump; thermal cycling performance; wafer level chip scale packages; Chip scale packaging; Copper; Electronic packaging thermal management; Electronics packaging; Leg; Manufacturing; Plastic films; Polyimides; Thermal stresses; Wafer scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing and Technology, 31st International Conference on
Conference_Location :
Petaling Jaya
ISSN :
1089-8190
Print_ISBN :
978-1-4244-0730-9
Electronic_ISBN :
1089-8190
Type :
conf
DOI :
10.1109/IEMT.2006.4456448
Filename :
4456448
Link To Document :
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