Study of ultra-scaled SiGe/Si core/shell nanowire FETs for CMOS applications

Author

Paul, Abhijeet ; Mehrotra, Saumitra ; Luisier, Mathieu ; Klimeck, Gerhard

Author_Institution

Network for Comput. Nanotechnol., Purdue Univ., West Lafayette, IN, USA

fYear

2009

fDate

9-11 Dec. 2009

Firstpage

1

Lastpage

2

Abstract

SiGe/Si core/shell nanowire (NW) devices are promising candidates for the future generation MOSFETs providing better channel control and hole mobility. These core-shell devices can be exploited both as p- and n-type devices. The Si shell improves the semiconductor-oxide interface and enhances the device performances. The Germanium condensation technique is able to provide high Ge content (>50%) channel with Si as capping layer. In this work we investigate the viability of using these core/shell NWFETs for CMOS application.

Keywords

CMOS integrated circuits; MOSFET; field effect transistors; germanium; hole mobility; nanowires; silicon compounds; CMOS applications; MOSFET; capping layer; channel control; core-shell devices; core/shell NWFET; core/shell nanowire devices; germanium condensation technique; hole mobility; n-type device; p-type device; semiconductor-oxide interface; ultra-scaled core/shell nanowire FET; CMOS technology; Computer networks; Delay; FETs; Germanium silicon alloys; Hafnium oxide; MOSFETs; Nanoscale devices; Semiconductor device modeling; Silicon germanium;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Device Research Symposium, 2009. ISDRS '09. International

Conference_Location

College Park, MD

Print_ISBN

978-1-4244-6030-4

Electronic_ISBN

978-1-4244-6031-1

Type

conf

DOI

10.1109/ISDRS.2009.5378003

Filename

5378003