DocumentCode
3054291
Title
A System-Level Model for an Analog-to-Digital Converter
Author
Al-Eryani, Jidan ; Nitzsche, Dietmar ; Sattler, Sebastian
Author_Institution
Dept. of Reliable Circuits & Syst., Univ. of Erlangen-Nuremberg, Erlangen, Germany
fYear
2011
fDate
16-18 May 2011
Firstpage
100
Lastpage
105
Abstract
A system-level model for an analog-to-digital converter (ADC) is described. The main functions of the ADC are identified, then mapped into functional units to give a holistic view of the ADC´s behavior and more importantly, what the critical parameters are, and the main sources of errors. A trade off between high and low abstraction level is taken into consideration. The model is independent from a particular physical implementation.
Keywords
analogue-digital conversion; ADC; analog-to-digital converter; physical implementation; system-level model; Delay; Hardware; Jitter; Quantization; Signal resolution; Signal to noise ratio; ADC; analog to digital converter; behavioral model; fault model; system-level model;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW), 2011 IEEE 17th International
Conference_Location
Santa Barbara, CA
Print_ISBN
978-1-4577-1144-2
Type
conf
DOI
10.1109/IMS3TW.2011.24
Filename
6132747
Link To Document