DocumentCode :
3054774
Title :
Fabrication technique for arrays of Germanium-on-Nothing nanowires
Author :
Thomas, P.M. ; Pawlik, D.J. ; Romanczyk, B. ; Freeman, E. ; Rommel, S.L. ; Kurinec, S.K. ; Cheng, Z. ; Li, J. ; Park, J.-S. ; Hydrick, J.M. ; Fiorenza, J.G. ; Lochtefeld, A.
Author_Institution :
Dept. of Electr. & Microelectron. Eng., Rochester Inst. of Technol., Rochester, NY, USA
fYear :
2009
fDate :
9-11 Dec. 2009
Firstpage :
1
Lastpage :
2
Abstract :
The authors have presented a CMOS compatible method for the production and incorporation of NW arrays that may be a basis for future NWFETs and other NW based devices. This work also hints to the possibility of incorporating NWs of different semiconductor material onto the same substrate to achieve high performance FETs, LEDs, and other devices. The authors surmise that alternating layers of Ge and Si could produce stacked Ge NWs similar to the Si NW stacks in other work. Finally, the use of chemicals readily available to most fabrication facilities as well as the use of TMAH, to avoid the mobile ion contamination that can plaque other Si etchants, provides for a series of steps that could be incorporated into a CMOS facility.
Keywords :
CMOS integrated circuits; germanium; light emitting diodes; nanowires; silicon; CMOS compatible method; Ge; LED; NWFET; Si; TMAH; germanium-on-nothing nanowires arrays; mobile ion contamination; semiconductor material; silicon etchants; Chemicals; Contamination; Etching; FETs; Fabrication; Light emitting diodes; Nanowires; Production; Semiconductor materials; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-6030-4
Electronic_ISBN :
978-1-4244-6031-1
Type :
conf
DOI :
10.1109/ISDRS.2009.5378043
Filename :
5378043
Link To Document :
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