DocumentCode
3055082
Title
A multi-channel microprogrammed FFT processor
Author
Balakrishnan, M. ; Rao, A. V S M ; Bahl, R.
Author_Institution
Indian Institute of Technology, New Delhi, India
Volume
7
fYear
1982
fDate
30072
Firstpage
492
Lastpage
497
Abstract
The complexity of implementing a multi-channel real-time FFT processor is examined with emphasis on memory specifications and processor performance, Design alternatives are considered and finally the design of an optimal processor is presented. The designed system is microprogrammed and optimised for pipeline processing. A reduction of a factor of four in the mass storage speed has been achieved at the expense of a small size high-speed memory.
Keywords
Buffer storage; Bulk storage; Control systems; Delay; Demultiplexing; Hardware; Microprocessors; Parallel architectures; Pipelines; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '82.
Type
conf
DOI
10.1109/ICASSP.1982.1171668
Filename
1171668
Link To Document