Title :
Learning on an analog VLSI neural network chip
Author :
Tam, Simon M. ; Gupta, Bhusan ; Castro, Hernan A. ; Holler, Mark
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
The issues associated with implementing the error backpropagation algorithm on a 64-neuron nonvolatile analog VLSI neural network chip (ETANN) are described. Imperfections in the analog ETANN chip were identified and found to impose constraints on the learning process. A chip-in-the-loop learning technique and an adaptive, reinforced, bake-train-bake scheme are reported. These techniques have shown potential in surmounting the difficulties connected with learning on an analog neural network chip. Experimental results are reported
Keywords :
VLSI; learning systems; linear integrated circuits; microprocessor chips; neural nets; ETANN; adaptive bake-train-bake method; chip-in-the-loop learning; error backpropagation; learning process; nonvolatile analog VLSI neural network chip; Adaptive filters; Character recognition; EPROM; Educational institutions; Neural networks; Neurofeedback; Neurons; Output feedback; Pattern recognition; Very large scale integration;
Conference_Titel :
Systems, Man and Cybernetics, 1990. Conference Proceedings., IEEE International Conference on
Conference_Location :
Los Angeles, CA
Print_ISBN :
0-87942-597-0
DOI :
10.1109/ICSMC.1990.142209
