Exploiting potentially dead blocks for improving data cache reliability against soft errors

Soft errors due to energetic particle strikes are a big concern for systems to run in a reliable manner. This reliability concern have been more serious with technology scaling and aggressive leakage control mechanisms. Since cache memories consume the largest fraction of on-chip real estate, they are more vulnerable to soft errors, as compared to many other system components. This paper proposes a solution to the problem of designing a reliable data cache without trading reliability for performance and area, which is a typical characteristic of conventional parity and ECC based protection techniques. Although parity is simple and fast, it can detect only odd numbered errors without correcting any of them. On the other hand, ECC techniques are more complex and time-consuming, and have the capability of correcting some of the errors. Our technique enhances data cache reliability by storing the replica(s) of data items in active use into cache lines which hold data not likely to be reused. The bookkeeping information about replicas is maintained in a small fully associative cache called shadow cache. By exploiting the replicas to correct the soft errors enhances the data reliability. Since we keep the replicas in potentially dead blocks, the performance loss is negligible with a little extra chip area requirement for the shadow cache. Our experimental results indicate that our technique, compared to the previous similar two techniques, is more effective for enhancing the L1 data cache reliability in modern Superscalar machines with only negligible degradation in performance.