Title :
4H-SiC LJFET-based power IC using depletion load
Author :
Su, Ming ; Sheng, Kuang ; Zhao, Jian H. ; Li, Xueqing
Author_Institution :
Dept. of ECE, Rutgers Univ., Piscataway, NJ, USA
Abstract :
In this abstract, we describe the design and modeling of a super buffer gate drive circuit using low-voltage (LV) VC-LJFETs of enhancement and depletion modes. In contrast to the first power IC, this design eliminates the need for on-chip resistors, which raise concerns for resistance accuracy and matching due to epilayer doping, depletion cut-in and misalignment issues. In this work, normally-on VC-LJFETs with shorted gate and source terminals are used as transistor loads, whose nonlinear I-V characteristics allow faster switching of the power device in comparison to a DC-equivalent resistor-load driver. The exclusive use of VC-LJFET structure for the power device and gate driver assures process compatibility and monolithic fabrication of the power IC.
Keywords :
driver circuits; junction gate field effect transistors; low-power electronics; silicon compounds; LJFET power IC; SiC; depletion load; gate driver; low-voltage VC-LJFET; nonlinear I-V characteristic; power device; super buffer gate drive circuit; transistor load; Power integrated circuits;
Conference_Titel :
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-6030-4
Electronic_ISBN :
978-1-4244-6031-1
DOI :
10.1109/ISDRS.2009.5378114
