• DocumentCode
    3056282
  • Title

    Tri-dimensional reduced-order thermal model of stacked electronic structures

  • Author

    Feuillet, V. ; Gatto, V. ; Scudeller, Y. ; Jarny, Y.

  • Author_Institution
    Lab. de Thermocinetique, Ecole polytechnique de l´´universite de Nantes, France
  • fYear
    2004
  • fDate
    2004
  • Firstpage
    423
  • Lastpage
    428
  • Abstract
    This paper deals with the development of a reduced-order thermal modelling based on the analysis of heat spreading occurring in an element where a heat source is attached. The modelling, suitable for any stacked electronic structures, uses the elementary solution of the tri-dimensional heat conduction equation. The reduced-order thermal model is applied to the thermal design of an RF power component.
  • Keywords
    cooling; heat conduction; heat sinks; integrated circuit modelling; integrated circuit packaging; power semiconductor devices; reduced order systems; semiconductor device models; semiconductor device packaging; thermal analysis; thermal management (packaging); RF power component; heat source; heat spreading; stacked electronic structures; thermal design; tri-dimensional heat conduction equation; tri-dimensional reduced-order thermal model; Conducting materials; Electronic packaging thermal management; Equations; Heat sinks; Radio frequency; Resistance heating; Semiconductor materials; Substrates; Thermal conductivity; Thermal resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, 2004. EuroSimE 2004. Proceedings of the 5th International Conference on
  • Print_ISBN
    0-7803-8420-2
  • Type

    conf

  • DOI
    10.1109/ESIME.2004.1304073
  • Filename
    1304073