• DocumentCode
    3056349
  • Title

    DP-Gen: a datapath generator for multiple-FPGA applications

  • Author

    Fang, Wen-Jong ; Wu, Allen C H ; Yen, Ti-Yen ; Lin, Tsair-Chin

  • Author_Institution
    Dept. of Comput. Sci., Tsing Hua Univ., Hsinchu, China
  • fYear
    1997
  • fDate
    28-31 Jan 1997
  • Firstpage
    563
  • Lastpage
    568
  • Abstract
    Presents a datapath generator for multiple-FPGA applications. This datapath generator is able to generate complex datapath designs described in HDLs. Our datapath generator uses a novel synthesis and partitioning approach which bridges the gap between RTL/logic synthesis and physical partitioning to fully exploit the design structural hierarchy for multiple-FPGA implementations. Experiments on a number of benchmarking circuits and industry designs demonstrate that the generator can effectively and efficiently produce high-density multiple-FPGA datapaths
  • Keywords
    field programmable gate arrays; logic CAD; logic partitioning; DP-Gen; benchmarking circuits; complex datapath designs; datapath generator; design structural hierarchy; field-programmable gate arrays; hardware description languages; high-density multiple-FPGA datapaths; industry designs; logic partitioning; logic synthesis; multiple-FPGA applications; physical partitioning; register transfer level synthesis; Application software; Application specific integrated circuits; Bridge circuits; Circuit synthesis; Computer science; Field programmable gate arrays; Hardware design languages; Integrated circuit manufacture; Logic design; Manufacturing industries;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1997. Proceedings of the ASP-DAC '97 Asia and South Pacific
  • Conference_Location
    Chiba
  • Print_ISBN
    0-7803-3662-3
  • Type

    conf

  • DOI
    10.1109/ASPDAC.1997.600337
  • Filename
    600337