On-line evolution of FPGA-based circuits: a case study on hash functions

Author

Damiani, Ernesto ; Tettamanzi, Andrea G B ; Liberali, Valentino

Author_Institution

Polo Diadattico e di Ricerca di Crema, Milan Univ., Italy

fYear

1999

fDate

1999

Firstpage

26

Lastpage

33

Abstract

An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16-bit address space into an 8-bit one. The target technology is FPGA, where the search space of the algorithm is made of the combinational functions computed by cells and of the interconnections among cells. An experimental study is carried out to determine the best set of parameters for on-line execution. It is observed that small population size leads to more effective results when short execution time is required. An application of the evolutionary approach presented in the paper for on-line tuning of the function during cache memory operation is also discussed

Keywords

cache storage; combinational circuits; cryptography; evolutionary computation; field programmable gate arrays; 16-bit address space; FPGA-based circuits; cache memory operation; combinational functions; evolutionary algorithm; hash functions; online evolution; search space; Algorithm design and analysis; Circuit synthesis; Computer aided software engineering; Design automation; Electronic equipment testing; Electronic switching systems; Evolution (biology); Evolutionary computation; Field programmable gate arrays; Hardware;

fLanguage

English

Publisher

ieee

Conference_Titel

Evolvable Hardware, 1999. Proceedings of the First NASA/DoD Workshop on

Conference_Location

Pasadena, CA

Print_ISBN

0-7695-0256-3

Type

conf

DOI

10.1109/EH.1999.785432

Filename

785432