• DocumentCode
    3056662
  • Title

    Hardware complexities of low-complexity Chase Reed Solomon decoders and comparisons

  • Author

    Hao Wang ; Wei Zhang ; Jing Wang ; Zhe Jiang

  • Author_Institution
    Sch. of Electron. Inf. Eng., Tianjin Univ., Tianjin, China
  • fYear
    2012
  • fDate
    2-5 Dec. 2012
  • Firstpage
    216
  • Lastpage
    219
  • Abstract
    Reed-Solomon (RS) codes are widely used in digital communication and storage systems. Algebraic soft-decision decoding (ASD) of RS codes can achieve significant coding gain over the hard-decision decoding (HDD). Compared with other ASD algorithms, the low-complexity Chase (LCC) decoding algorithm needs less computation complexity with similar or higher coding gain. Several techniques have been applied to reduce the decoding complexity and made the LCC decoding algorithm easier to be implemented by hardware. This paper answers the question that which practical LCC decoder is the most efficient. In addition, decoder complexity comparisons for an example (255, 239) RS code constructed over GF(28) are presented. This paper also provides discussions on how the hardware complexities of LCC decoders change with the decoding parameter and code rate.
  • Keywords
    Reed-Solomon codes; computational complexity; decision making; decoding; ASD; HDD; LCC; RS code; Reed-Solomon codes; algebraic soft-decision decoding; computation complexity; decoding complexity; hard-decision decoding; hardware complexities; low-complexity chase Reed Solomon decoders; Complexity theory; Decoding; Hardware; Interpolation; Polynomials; Reed-Solomon codes; Vectors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (APCCAS), 2012 IEEE Asia Pacific Conference on
  • Conference_Location
    Kaohsiung
  • Print_ISBN
    978-1-4577-1728-4
  • Type

    conf

  • DOI
    10.1109/APCCAS.2012.6419010
  • Filename
    6419010