• DocumentCode
    3056713
  • Title

    A new vertical MOSFET "Vertical Logic Circuit (VLC) MOSFET" suppressing asymmetric characteristics and realizing an ultra compact and robust logic circuit

  • Author

    Sakui, Koji ; Endoh, Tetsuo

  • Author_Institution
    Center for Interdiscipl. Res., Tohoku Univ., Sendai, Japan
  • fYear
    2009
  • fDate
    9-11 Dec. 2009
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    This paper is devoted to examining the asymmetric characteristics of the conventional vertical MOSFET, proposing a new vertical MOSFET which can suppress the asymmetric characteristics, and validating its impact on an ultra compact and robust logic circuit.
  • Keywords
    MOSFET; logic circuits; asymmetric characteristics; robust logic circuit; ultra compact circuit; vertical MOSFET; vertical logic circuit MOSFET; Circuit synthesis; Delay; Educational institutions; Impedance; Inverters; Logic circuits; MOS devices; MOSFET circuits; Resistors; Robustness;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Device Research Symposium, 2009. ISDRS '09. International
  • Conference_Location
    College Park, MD
  • Print_ISBN
    978-1-4244-6030-4
  • Electronic_ISBN
    978-1-4244-6031-1
  • Type

    conf

  • DOI
    10.1109/ISDRS.2009.5378136
  • Filename
    5378136
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3056713