DocumentCode
3056795
Title
Survey of the performance of nonblocking switches with FIFO input buffers
Author
Oie, Yuji ; Suda, Tatsuya ; Murata, Masayuki ; Miyahara, Hideo
Author_Institution
Dept. of Electr. Eng., Sasebo Coll. of Technol., Japan
fYear
1990
fDate
16-19 Apr 1990
Firstpage
737
Abstract
The authors consider nonblocking switches with FIFO (first in, first out) input buffers and discuss their performance. Increasing the switching capacity is examined as an improvement technique for these switches, and its effect on the switch performance is investigated. The switch that is operating twice as fast as the input/output channels and the output buffered switch achieve a maximum throughput of 1.0. The switch with input bus and with smaller switching capacity can also achieve high maximum throughput, and it can achieve a cell-loss probability nearly equal to zero at rather high traffic load if buffers are placed on inputs and outputs
Keywords
packet switching; probability; telecommunication traffic; ATM; FIFO input buffers; cell-loss probability; maximum throughput; nonblocking switches; switching capacity; traffic load; Application software; Asynchronous transfer mode; B-ISDN; Communication switching; Hardware; Packet switching; Protocols; Switches; Very large scale integration; Videos;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, 1990. ICC '90, Including Supercomm Technical Sessions. SUPERCOMM/ICC '90. Conference Record., IEEE International Conference on
Conference_Location
Atlanta, GA
Type
conf
DOI
10.1109/ICC.1990.117175
Filename
117175
Link To Document