DocumentCode :
3056948
Title :
A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion
Author :
Tang, Hongying ; Low, Joshua Yung Lih ; Low, Jeremy Yung Shern ; Siek, Liter ; Ching Chuen Jong ; Chip-Hong Chang
Author_Institution :
VIRTUS IC Design Centre of Excellence, Nanyang Technol. Univ., Singapore, Singapore
fYear :
2012
fDate :
2-5 Dec. 2012
Firstpage :
272
Lastpage :
275
Abstract :
This paper presents a new 16-bit analog-to-residue converter (ARC) for a three moduli set {26-1, 26, 26+1} RNS with a dynamic range of 18 bits. Based on dual-slope integrating principle, direct conversion from analog to residue representation is achieved with only three modulo counters after the voltage sensing circuits. By eliminating the costly binary-to-residue converter, the proposed ARC saves 81.6% of area in comparison with the conventional two-stage architecture consisting of an integrating ADC and a RNS forward converter.
Keywords :
analogue-digital conversion; residue number systems; ARC; RNS forward converter; analog-to-residue conversion; binary-to-residue converter; dual-slope integrating circuit; voltage sensing circuits; Digital signal processing; Hardware; Logic gates; Radiation detectors; Signal resolution; USA Councils;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (APCCAS), 2012 IEEE Asia Pacific Conference on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4577-1728-4
Type :
conf
DOI :
10.1109/APCCAS.2012.6419024
Filename :
6419024
Link To Document :
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