• DocumentCode
    3056973
  • Title

    Multiple-output neuron MOS current mirror with bias circuit suitable for Digital-to-Analog converter

  • Author

    Matsumoto, Shinichi ; Fukai, S. ; Shimizu, Atsuki ; Ishikawa, Yozo

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Saga Univ., Saga, Japan
  • fYear
    2012
  • fDate
    2-5 Dec. 2012
  • Firstpage
    276
  • Lastpage
    279
  • Abstract
    This paper proposes a multiple-output neuron MOS current mirror with bias circuit suitable for a 14-bit current-steering D/A converter. Area of the D/A converter is decreased by sharing a floating-gate of a neuron MOSFET. A novel bias circuit is needed for sharing the floating-gate. The multiple-output neuron MOS current mirror with bias circuit reduces the total gate area to 1/811 the multiple-output neuron MOS current mirror without bias circuit. The performance of the proposed circuit is evaluated by HSPICE simulation with On-Semiconductor 1.2μm CMOS device parameters. Simulation results show that the proposed circuit realizes saturation region in V out >; 0.2[V], the current copy accuracy is 99.99863%.
  • Keywords
    CMOS integrated circuits; MOSFET; SPICE; circuit simulation; current mirrors; digital-analogue conversion; CMOS device parameter; HSPICE simulation; bias circuit; circuit performance; circuit simulation; current-steering D/A converter; digital-to-analog converter; floating-gate sharing; multiple-output neuron MOS current mirror; neuron MOSFET; on-semiconductor; saturation region; size 1.2 mum; word length 14 bit; Accuracy; Integrated circuit modeling; Logic gates; Low voltage; MOSFET circuits; Mirrors; Neurons;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (APCCAS), 2012 IEEE Asia Pacific Conference on
  • Conference_Location
    Kaohsiung
  • Print_ISBN
    978-1-4577-1728-4
  • Type

    conf

  • DOI
    10.1109/APCCAS.2012.6419025
  • Filename
    6419025