Weighted least squares design of wideband digital integrator using interlaced sampling method

In this paper, the weighted least squares (WLS) design of wideband digital integrator is presented. First, it is shown that there are irreducible errors at high frequency band for conventional digital integrators using the Shannon sampling scheme. To solve this problem, a WLS method based on interlaced sampling scheme is then presented to design digital integrator. Because the closed-form design is obtained, the filter coefficients are easily computed by matrix inversion. Finally, design examples are demonstrated to show that the proposed method has smaller design error than the conventional digital integrator that does not use the auxiliary of interlaced sampling signal.