DocumentCode :
3057618
Title :
Understanding limits to conductivity of metal nanowires
Author :
Dunham, Scott T. ; Feldman, Baruch
Author_Institution :
Univ. of Washington, Seattle, WA, USA
fYear :
2009
fDate :
9-11 Dec. 2009
Firstpage :
1
Lastpage :
1
Abstract :
Reduced conductivity in sub-100 nm metal wires used as interconnects is a performance limiting factor in integrated circuits. In order to understand the sources of conductivity degradation with the aim of optimizing metal nanowire conductivity, we have analyzed potential sources of electron momentum loss, including surface roughness scattering, grain boundary reflection and interactions with Ta liner layers. Based on the roughness spectrum of metal films, we conclude that primarily specular scattering should be achievable at metal/dielectric interfaces for Cu technology. Using non-equilibrium Green´s function methods, we find substantial reflection at Cu and Ag grain boundaries and find that both the change in grain orientation and disorder in the boundary contribute significantly to reflectivity. Using the same approach for Cu/Ta interfaces, we predict substantial conductivity degradation due to electron interactions with thin liner layers. Based on our analyses, we conclude by suggesting promising directions for maximizing conductivity as interconnect dimensions shrink further below 100 nm.
Keywords :
Green´s function methods; copper; dielectric materials; electrical conductivity; grain boundaries; integrated circuit interconnections; metallic thin films; nanowires; silver; surface roughness; surface scattering; tantalum; Ag; Cu; Cu-Ta; boundary disorder; conductivity degradation; copper technology; electron momentum loss; grain boundary reflection; grain orientation; integrated circuits; interconnects; limiting factor; metal films; metal nanowires; metal-dielectric interfaces; nonequilibrium Green´s function; roughness spectrum; size 100 nm; specular scattering; surface roughness scattering; tantalum liner layers; Conductivity; Degradation; Electrons; Grain boundaries; Integrated circuit interconnections; Nanowires; Reflection; Rough surfaces; Scattering; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-6030-4
Electronic_ISBN :
978-1-4244-6031-1
Type :
conf
DOI :
10.1109/ISDRS.2009.5378174
Filename :
5378174
Link To Document :
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