A robust multithreaded HDL/ESL simulator for deep submicron integrated circuit designs

This paper describes a robust multithreaded Hardware Description Language (HDL) and Electronic System-Level (ESL) logic simulator, V2Sim™. The simulator uses patented [1] multithreaded simulation technology to achieve superior scalable performance on advanced multiprocessor/multicore computers. As further enhancements, we have incorporated a multithreaded race logic auditor and a multithreaded race logic synthesizer into V2Sim™, so that V2Sim™ can automatically detect race logic in user HDL/ESL designs, and fix those designs to eliminate race logic. This renders V2Sim™ can robustly handle any large-scale integrated circuit (IC) designs, and its multithreaded simulation results for those designs will be the same as that running on a single-CPU/core computer. Using V2Sim™, designers can cut-down their new IC product development time by 40% or more, and meet time-to-market.