Title :
Influence of polysilicon thickness on the microwave attenuation losses of the CPWs fabricated on polysilicon-passivated high-resistivity silicon substrates
Author :
Chen, Chao-Jung ; Wang, Ruey-Lue ; Su, Yan-Kuin ; Huang, Chun-Yuan ; Chen, Yung-Feng ; Hung, Cheng-Yuan
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Abstract :
In this paper, the microwave performance of coplanar waveguides (CPWs) fabricated on high-resistivity silicon (HRS) substrates with various polysilicon film thicknesses was investigated. CPWs were fabricated on p-type silicon substrates with resistivities of 6000-8000 ¿-cm. Polysilicon films with thicknesses ranging from 100 to 900 nm were deposited by LPCVD, in which a 300 nm-deposited polysilicon was generally used as surface passication layer on the HRS substrates. Subsequently, the oxide layer was deposited on the polysilicon layer by PECVD, and a pure aluminum film was evaporated and patterned to form the 50-¿-CPW test structures. The CPWs were characterized through S-parameter measurements for up to 40 GHz by using an HP-8510 network analyzer. Experimental results show that the microwave attenuation loss can be influenced by a small variation of polysilicon layer thickness, especially when the thickness is smaller. Thicker polysilicon layers lead to higher grain boundary density, hence, free carriers can be rapidly trapped within grain boundary interfaces of the polysilicon, and the surface recombination velocity can be enhanced, thus, reducing the conductivity and bias-dependence of the surface layers. Furthermore, the bias effect on the HRS with various polysilicon thicknesses was taken into account as well.
Keywords :
coplanar waveguides; electrical resistivity; electron traps; elemental semiconductors; grain boundaries; hole traps; microwave materials; passivation; plasma CVD coatings; semiconductor thin films; silicon; substrates; surface conductivity; surface recombination; CPW test structures; LPCVD; PECVD; Si; coplanar waveguides; electrical resistivity; film evaporation; free carrier trapping; frequency 40 GHz; grain boundary density; grain boundary interfaces; high-resistivity p-type silicon substrates; low pressure chemical vapour deposition; microwave attenuation loss; oxide layer; plasma enhanced chemical vapour deposition; polysilicon film thickness effects; polysilicon-passivated silicon substrates; pure aluminum film; resistance 50 ohm; resistivity 6000 ohmcm to 8000 ohmcm; size 100 nm to 900 nm; surface bias dependence; surface conductivity; surface passication layer; surface recombination velocity; Aluminum; Attenuation; Conductivity; Coplanar waveguides; Grain boundaries; Scattering parameters; Semiconductor films; Silicon; Substrates; Testing;
Conference_Titel :
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-6030-4
Electronic_ISBN :
978-1-4244-6031-1
DOI :
10.1109/ISDRS.2009.5378185