Title :
A SIMD-accelerated software rendering pipeline for 3D graphics processing
Author :
Yu, E.S. ; Chung-Ho Chen
Author_Institution :
Dept. of Electr. Eng. & Inst. of Comput. & Commun. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Abstract :
This paper presents a SIMD-accelerated software rendering pipeline for 3D graphics processing with multi-core architecture. The multi-core architecture is based on ARMv5 ISA which employs a SIMD unit developed by this work. We also propose a window search bounding box algorithm that can achieve zero failure in pixel tests so that speedup traversal stage is about 20 times faster than the traditional method. Finally, we use an early culling strategy to decrease unnecessary lighting operations.
Keywords :
graphics processing units; multiprocessing systems; parallel processing; rendering (computer graphics); search problems; 3D graphics processing; ARMv5 ISA; SIMD unit; SIMD-accelerated software rendering pipeline; culling strategy; multicore architecture; traversal stage; unnecessary lighting operations; window search bounding box algorithm; Computer architecture; Graphics processing units; Pipelines; Registers; Rendering (computer graphics);
Conference_Titel :
Circuits and Systems (APCCAS), 2012 IEEE Asia Pacific Conference on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4577-1728-4
DOI :
10.1109/APCCAS.2012.6419066
