A new lock detector for phase-lock receivers

In most phase-lock receivers the output of a quadrature phase detector is low-pass filtered to produce a voltage that is used in two different ways. First, the voltage is used in a coherent automatic gain control (AGC) system to control the gain(s) of one or more receiver stages. Secondly, the filtered output of the quadrature detector is subjected to a user-defined threshold. Phase lock is declared if an above threshold condition is observed; otherwise, the receiver is considered to be in an unlock state. This level-detection scheme is the basis of the quadrature lock detector. The AGC and lock detection subsystems can interact to produce undesirable results under false lock conditions. The quadrature phase detector is common to both subsystems, and it is the root of the problem. Basically, the output of the quadrature phase detector may contain a significant DC component under false lock conditions. The AGC subsystem may drive up receiver gain until this spurious DC component is above lock detector threshold. A false-positive lock indication would result; it may go undetected until it is noted by some independent means. This problem can be reduced significantly, or possibly eliminated, by a lock detector algorithm described in the paper. Compared to the classical quadrature lock detector, the new algorithm is better able to differentiate true phase lock from anomalous false lock. Furthermore, the commonly-used quadrature lock detector is a simple, first-order approximation of the new lock detector