DocumentCode
3058130
Title
A mapping from sequence-pair to rectangular dissection
Author
Murata, H. ; Fujiyoshi, K. ; Watanabe, T. ; Kajitani, Y.
Author_Institution
Japan Adv. Inst. of Sci. & Technol., Ishikawa, Japan
fYear
1997
fDate
28-31 Jan 1997
Firstpage
625
Lastpage
633
Abstract
A fundamental issue in floorplanning is in how to represent candidate solutions. A representation called sequence-pair was recently proposed. Seq-pair is so general as to represent an area minimum placement, and also efficient because it does not represent any overlapping placement. However, seq-pair is not expressive enough since channels are not represented. The paper gives a mapping from seq-pair to rectangular dissection, which represents channels by line segments. Consequently, candidate arrangements of modules and channels are successfully represented with the generality and the efficiency inherited from the seq-pair
Keywords
VLSI; circuit layout CAD; integrated circuit layout; modules; VLSI physical design; area minimum placement; candidate solution representation; channels; floorplanning; line segments; modules; rectangular dissection; sequence-pair; Algorithm design and analysis; Circuit simulation; Genetic algorithms; Simulated annealing; Stochastic processes; Sufficient conditions; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1997. Proceedings of the ASP-DAC '97 Asia and South Pacific
Conference_Location
Chiba
Print_ISBN
0-7803-3662-3
Type
conf
DOI
10.1109/ASPDAC.1997.600346
Filename
600346
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