Title :
Memory cell capacitor using cross double patterning technology for gigabit density DRAM
Author :
Kim, Cheon Bae ; Kim, S.G. ; Cho, S.I. ; Kim, K.-S. ; Lee, K.P. ; Roh, Yong Han
Author_Institution :
Sch. of Inf. & Commun. Eng., Sungkyunkwan Univ., Suwon, South Korea
Abstract :
In order to achieve dynamic random access memory (DRAM) with high density and high performance, abrupt scaling down of memory device is necessary. But lithography tool cannot follow up memory device scaling down. Double patterning technology (DPT) has been reported as a promising candidate to extend lithography limit. But DPT has a technical problem of pattern to pattern overlay [3]. To overcome overlay problems, cross double patterning technology (cross DPT) in which second pattern is perpendicular to first one is introduced. In this paper, for the first time, memory cell capacitor using cross DPT is successfully developed. Process integration and electrical characteristics of memory cell capacitor using cross DPT is presented.
Keywords :
DRAM chips; lithography; DRAM; double patterning technology; dynamic random access memory; memory cell capacitor; memory device; Capacitance; Capacitors; Electric variables; Leakage current; Lithography; Material storage; Random access memory; Scanning electron microscopy; Shape; Supercapacitors;
Conference_Titel :
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-6030-4
Electronic_ISBN :
978-1-4244-6031-1
DOI :
10.1109/ISDRS.2009.5378225