• DocumentCode
    3058867
  • Title

    Correlation between high-density trap states and local stress near SOI/BOX interface in SIMOX wafers

  • Author

    Nakajima, Yoshikata ; Watanabe, Yukitoshi ; Hanajiri, Tatsuro ; Toyabe, Toru ; Sugano, Takuo

  • Author_Institution
    Bio-Nano Electron. Res. Center, Toyo Univ., Kawagoe, Japan
  • fYear
    2009
  • fDate
    9-11 Dec. 2009
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Separation by implanted oxygen (SIMOX) wafers and bonded wafers are commercially available silicon-on-insulator (SOI) wafers. In particular, SIMOX process technologies have become important in system-on-a-chip (SoC) fabricated on SOI/Bulk hybrid substrates composed of SOI region for the logic circuits and bulk region for the dynamic random access memories (DRAMs) in recent years. However, we found that low-dose SIMOX wafers have energetically localized acceptor-like and donor-like trap states with the density of 1011 cm-2 at the SOI/buried oxide (BOX) interface by back-gate characteristics. In addition, we estimated that the high-density trap states are distributed within about 30 nm from the SOI/BOX interface in SOI layer by front-gate characteristics in MOSFETs with SOI layers of different thicknesses. Furthermore, we speculated that the distribution of the trap states in the SOI layer is attributed to nano-scale roughness at the SOI/BOX interface, which is peculiar to the SIMOX process. In this paper, we discuss the origins of the high-density trap states in SOI layer of SIMOX wafers considering the roughness at the SOI/BOX interface.
  • Keywords
    SIMOX; buried layers; electron traps; hole traps; semiconductor doping; silicon-on-insulator; SIMOX wafers; SOI-BOX interface; back-gate characteristics; buried oxide interface; donor like trap state; high density trap state; local stress; localized acceptor like state; nanoscale roughness; silicon-on-insulator wafer; trap states; Electric variables; Electron traps; MOSFETs; Scanning probe microscopy; Silicon on insulator technology; Spectroscopy; State estimation; Stress; System-on-a-chip; Wafer bonding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Device Research Symposium, 2009. ISDRS '09. International
  • Conference_Location
    College Park, MD
  • Print_ISBN
    978-1-4244-6030-4
  • Electronic_ISBN
    978-1-4244-6031-1
  • Type

    conf

  • DOI
    10.1109/ISDRS.2009.5378232
  • Filename
    5378232