A reconfigurable ASIP-based approach for high performance image signal processing

Author

Asri, M. ; Hsuan-Chun Liao ; Isshiki, Tsuyoshi ; Dongju Li ; Kunieda, Hiroaki

Author_Institution

Grad. Sch. of Sci. & Eng., Tokyo Inst. of Technol., Tokyo, Japan

fYear

2012

fDate

2-5 Dec. 2012

Firstpage

611

Lastpage

614

Abstract

Digital image signal processing nowadays has been widely used in embedded system. With the emergence of new image formats, the computational workload has been massively increasing, while at the same time, significant level of programmability is demanded in order to cope with new specification/interface. ASIC (Application Specific Integrated Circuit) and GPP (General Purpose Processor) have been largely used as the two commonplace countermeasures to fulfill those requirements.

Keywords

application specific integrated circuits; digital signal processing chips; embedded systems; image processing; instruction sets; integrated circuit design; printed circuits; reconfigurable architectures; ASIC; GPP; application specific integrated circuit; computational workload; embedded system; general purpose processor; high-performance digital image signal processing constraints; image formats; programmability level constraints; reconfigurable ASIP-based approach design; Application specific integrated circuits; Digital signal processing; Image processing; Multicore processing; Reduced instruction set computing; Registers; ASIP; embedded system; high-level synthesis; microprocessor; reconfigurable system;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (APCCAS), 2012 IEEE Asia Pacific Conference on

Conference_Location

Kaohsiung

Print_ISBN

978-1-4577-1728-4

Type

conf

DOI

10.1109/APCCAS.2012.6419109

Filename

6419109