DocumentCode
3059000
Title
Charge trapping flash device with Si3 N4 /Hfx Al1−x O stack charge trapping layer
Author
Ye, Zong-Hao ; Chang-Liao, Kuei-Shu ; Tsai, Tzu-Ting ; Wang, Tien-Ko
Author_Institution
Dept. of Eng. & Syst. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear
2009
fDate
9-11 Dec. 2009
Firstpage
1
Lastpage
2
Abstract
Although enhancement on electrical properties of flash devices with HfAlO charge trapping layer has been reported, there are still serious problems in retention characteristics. In this work, a charge-trapping (CT) flash device with Si3N4/HfxAl1-xO as charge trapping layer is presented. Experimental results show that the program/erase speeds of the proposed devices can be enhanced and the retention characteristic is improved as well.
Keywords
NAND circuits; electron traps; flash memories; hafnium compounds; hole traps; silicon compounds; Si3N4-HfxAl1-xO; charge trapping flash device; electrical property enhancement; retention characteristics; stack charge trapping layer; Educational institutions; Electron devices; Electron traps; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; MOCVD; SONOS devices; Systems engineering and theory; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location
College Park, MD
Print_ISBN
978-1-4244-6030-4
Electronic_ISBN
978-1-4244-6031-1
Type
conf
DOI
10.1109/ISDRS.2009.5378239
Filename
5378239
Link To Document