DocumentCode :
3059453
Title :
Super low power 8-bit CPU with pass-transistor logic
Author :
Taki, Kazuo ; Lee, Bu-Yeol ; Tanaka, Hideki ; Konishi, Kenzo
Author_Institution :
Dept. of Comput. & Syst. Eng., Kobe Univ., Japan
fYear :
1997
fDate :
28-31 Jan 1997
Firstpage :
663
Lastpage :
664
Abstract :
A very low power 8-bit CPU core has been designed based on an original pass-transistor logic family, the SPL (single-rail pass-transistor logic) and SPHL (single-rail pass-transistor and holders logic). The instruction set and external timings are compatible with the Zilog Z80. The average supply current is 740 μA at 3 V with a 10 MHz-clock, equivalent to 26% of that of the commercial CMOS Z80 CPU cores using the same design rules
Keywords :
CMOS digital integrated circuits; large scale integration; logic design; microprocessor chips; transistor-transistor logic; 10 MHz; 3 V; 740 muA; 8 bit; CMOS IC; CPU; LSI; SPHL; SPL; Zilog Z80; logic design; microprocessor chip; pass-transistor logic; Binary decision diagrams; CMOS logic circuits; Central Processing Unit; Clocks; Combinational circuits; Delay; Logic design; MOS devices; Personal digital assistants; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the ASP-DAC '97 Asia and South Pacific
Conference_Location :
Chiba
Print_ISBN :
0-7803-3662-3
Type :
conf
DOI :
10.1109/ASPDAC.1997.600352
Filename :
600352
Link To Document :
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