DS2IS: Dictionary-based Segmented Signal Inversion Scheme for Low Power Dynamic Bus Design

As technology scales down to nanometer technology, coupling effects between neighboring wires have a significant impact on power consumption and signal integrity on on-chip interconnects. Especially, on-chip inductive effects need to be taken into account due to low-resistance metal interconnection and fast signal transition times in nowadays IC design. In this paper, we propose a low power bus encoding scheme which reduces the capacitive and inductive effects between bus wires simultaneously by the measurement of real RLC model. The experimental results showed that our approach can save power consumption of the bus up to 15%.