Analysis and implementation of packet processing functions in Internet routers

Packet processing functions in Internet routers represent the most important part of the router´s data plane. In this paper, packet processing functions are analyzed to determine which functions are the most critical in terms of the router´s scalability. Special attention is given to lookup function which is one of the most critical packet processing functions. Advanced lookup algorithm is proposed in this paper. Also, FPGA implementation of the packet processing functions is proposed in this paper, as well as the FPGA implementation of the proposed advanced lookup algorithm.