DocumentCode
3060742
Title
Analysis of oxide bulk trapped charge distribution and densities from photo injection characteristics of oxide-nitride-oxide (ONO) structures
Author
Lee, Woong ; Yoo, Dae-Han ; Lee, Eun-Young ; Bok, Jinkwon ; Hyung, Youngwoo ; Roh, Younghan
Author_Institution
Sch. of Inf. & Commun. Eng., Sungkyunkwan Univ., Suwon, South Korea
fYear
2009
fDate
9-11 Dec. 2009
Firstpage
1
Lastpage
2
Abstract
The thickness of ONO inter-poly dielectrics dominates the program and erase speed of a flash memory cell transistor with a stack gate structure. Therefore, as flash devices shrink, it is important to prevent the degradation in reliability while scaling down the thickness of the oxide. However, the thickness of the bottom oxide formed on a heavily doped poly-silicon cannot be easily reduced because of its high defect density due to a high concentration of dopants in the floating gate and an enhancement of the oxide thickness caused by oxidation of the doped polysilicon. In order to overcome these problems, advanced LPCVD technology has been introduced, but the LPCVD oxide films still have many defect densities in comparison with thermal oxide films. In this work, the bulk trapped charges distribution and density in the bottom LPCVD oxide were quantitatively investigated by photocurrent-voltage characteristics. In addition, we found that the defect density and distribution in the bottom LPCVD oxide were remarkably decreased using post plasma oxidation.
Keywords
chemical vapour deposition; dielectric materials; flash memories; integrated circuit reliability; oxidation; semiconductor doping; LPCVD oxide films; LPCVD technology; ONO interpoly dielectrics; charge density; dopants; flash devices; flash memory cell transistor; floating gate; heavily doped polysilicon; high defect density; oxide bulk trapped charge distribution; oxide thickness; oxide-nitride-oxide structures; photo injection characteristics; photocurrent-voltage characteristics; post plasma oxidation; program and erase speed; stack gate structure; thermal oxide films; Educational institutions; Electron traps; Equations; Information analysis; Nonvolatile memory; Oxidation; Photoelectricity; Plasma density; Reliability engineering; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location
College Park, MD
Print_ISBN
978-1-4244-6030-4
Electronic_ISBN
978-1-4244-6031-1
Type
conf
DOI
10.1109/ISDRS.2009.5378319
Filename
5378319
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