Title :
An ASIC design for the Ethernet-ATM Bridge
Author :
Sung, Guo Ming ; Hsieh, Hsiang Yuan
Author_Institution :
Dept. of Electr. Eng., Nat. Taipei Univ. of Technol., Taipei
Abstract :
This paper presents the design and implementation of an ASIC of the Ethernet-ATM bridge which is fabricated in UMC 0.18 mum 1P6M CMOS process. The main function of this chip is to build a bridge between Ethernet and ATM which is not only to merge three chips into a single chip, but also to give up the RISC processor. This development will enhance the broadband network switching ability and stability with small chip size and lower cost. The simulation results present that the gate number, the clock frequency, and the power consumption are 32 kilo-gates, 50 MHz, and 40.2 mW, respectively.
Keywords :
CMOS integrated circuits; application specific integrated circuits; asynchronous transfer mode; broadband networks; local area networks; stability; ASIC design; Ethernet-ATM bridge; RISC processor; UMC 1P6M CMOS process; asynchronous transfer mode; broadband network stability; broadband network switching ability; frequency 50 MHz; power 40.2 mW; Application specific integrated circuits; Asynchronous transfer mode; Bridges; Broadband communication; CMOS process; Clocks; Costs; Ethernet networks; Reduced instruction set computing; Stability;
Conference_Titel :
Intelligent Signal Processing and Communications Systems, 2008. ISPACS 2008. International Symposium on
Conference_Location :
Bangkok
Print_ISBN :
978-1-4244-2564-8
Electronic_ISBN :
978-1-4244-2565-5
DOI :
10.1109/ISPACS.2009.4806687
