DocumentCode
3062340
Title
A current-mode, 3 V, 20 MHz, 9-bit equivalent CMOS sample-and-hold circuit
Author
Sugimoto, Yasuhiro ; Iida, Tetsuya
Author_Institution
Dept. of Electr. & Electron. Eng., Chuo Univ., Tokyo, Japan
fYear
1997
fDate
28-31 Jan 1997
Firstpage
685
Lastpage
686
Abstract
A new current-mode, low-power, low-voltage and high-speed CMOS sample-and-hold circuit has been designed and fabricated. A new current-mode differential switching scheme has been adopted to eliminate errors caused by feedthrough injection from the sample switches. The experimental result yields 9-bit resolution in 9 mW power dissipation, in a 20 MHz clock frequency from a 3 V power supply
Keywords
CMOS logic circuits; current-mode logic; sample and hold circuits; 20 MHz; 3 V; 9 bit; 9 mW; 9-bit equivalent CMOS sample-and-hold circuit; current-mode differential switching scheme; current-mode logic; feedthrough injection; Circuit simulation; Clocks; Differential amplifiers; Frequency conversion; Linearity; Pipelines; Switches; Switching circuits; Switching converters; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1997. Proceedings of the ASP-DAC '97 Asia and South Pacific
Conference_Location
Chiba
Print_ISBN
0-7803-3662-3
Type
conf
DOI
10.1109/ASPDAC.1997.600364
Filename
600364
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