Title :
JFET/SOS devices: processing and gamma radiation effects
Author :
Jiping, Nie ; Zhongli, Liu ; Zhijing, He ; Fang, Yu ; Guohua, Li
Author_Institution :
Inst. of Semicond., Acad. Sinica, Beijing, China
Abstract :
A process for fabricating n-channel JFET/SOS (junction field-effect transistors on silicon-on-sapphire) has been researched. The gate p+-n junction was obtained by diffusion, and the conductive channel formed by a double ion implantation. Both enhancement and depletion mode transistors were fabricated in different processing conditions. From the results of the Co60 γ-ray irradiation experiments, we found that the devices had a good total dose radiation hardness. When the total dose was 5 Mrad(Si), their threshold voltages shift was less than 0.1 V. The variation of transconductance and the channel leakage current were also small
Keywords :
gamma-ray effects; ion implantation; junction gate field effect transistors; leakage currents; radiation hardening (electronics); silicon-on-insulator; Co60 γ-ray irradiation experiments; JFET/SOS devices; channel leakage current; conductive channel formation; depletion mode transistors; diffusion; double ion implantation; enhancement mode transistors; fabrication process; gamma radiation effects; gate p+-n junction; junction field-effect transistors; n-channel JFETs; threshold voltages shift; total dose radiation hardness; transconductance variation; FETs; Gamma rays; Insulation; Interface states; Ion implantation; Leakage current; P-n junctions; Silicon; Substrates; Threshold voltage;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-4306-9
DOI :
10.1109/ICSICT.1998.785793
