OTA-based high frequency CMOS multiplier and squaring circuit

Author

Hidayat, Risanuri ; Dejhan, Kobchai ; Moungnoul, Phichet ; Miyanaga, Yoshikazu

Author_Institution

Fac. of Eng. & Res., King Mongkut´´s Inst. of Technol. Ladkrabang, Bangkok

fYear

2009

fDate

8-11 Feb. 2009

Firstpage

1

Lastpage

4

Abstract

A gigahertz analog multiplier based on OTA and squaring is proposed. The multiplier has gigahertz frequency response is suitable to use in communication system. The circuit is based on 0.18 mum CMOS technology simulated using PSPICE level 7. This technique provides; wide dynamic range, GHz-bandwidth response and low power consumption. The proposed circuit has been simulated with PSPICE and achieved -3 dB bandwidth of 3.96 GHz. The total power dissipation is 0.588 mW with plusmn1 V power supply voltages..

Keywords

CMOS analogue integrated circuits; analogue multipliers; microwave amplifiers; microwave integrated circuits; operational amplifiers; OTA-based high frequency CMOS multiplier; PSPICE level 7 simulation; bandwidth 3.96 GHz; communication system; gigahertz analog multiplier; operational transconductance amplifiers; power 0.588 mW; power consumption; size 0.18 mum; squaring circuit; voltage -1 V to 1 V; Bandwidth; CMOS technology; Circuit simulation; Dynamic range; Energy consumption; Frequency response; Power dissipation; Power supplies; SPICE; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Intelligent Signal Processing and Communications Systems, 2008. ISPACS 2008. International Symposium on

Conference_Location

Bangkok

Print_ISBN

978-1-4244-2564-8

Electronic_ISBN

978-1-4244-2565-5

Type

conf

DOI

10.1109/ISPACS.2009.4806748

Filename

4806748