DocumentCode
3063315
Title
Optimization of MOSFETs with polysilicon-elevated source/drain
Author
Zimin, Sun ; Litian, Liu ; Zhijian, Li
Author_Institution
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear
1998
fDate
1998
Firstpage
188
Lastpage
190
Abstract
As MOSFETs size shrinks into the deep-submicrometer regime, shallow source and drain junctions and small source/drain series resistance will be required. MOSFET with polysilicon-elevated source/drain (PESD) structure can meet these requirements, and is an ideal candidate. This paper gives the optimization method for MOSFETs of such kind of structure
Keywords
MOSFET; capacitance; optimisation; silicon; MOSFET optimization; deep-submicron regime; polysilicon-elevated source/drain; Capacitance; Circuit simulation; Delay effects; Erbium; Inverters; MOSFET circuits; Medical simulation; Microelectronics; Sun; Transconductance;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on
Conference_Location
Beijing
Print_ISBN
0-7803-4306-9
Type
conf
DOI
10.1109/ICSICT.1998.785849
Filename
785849
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