Title :
Electro-chemical deposition technology for ULSI multilevel copper interconnects
Author :
Ting, Chiu H. ; Papapanayiotou, Demetrius ; Zhu, Mei
Author_Institution :
CuTek Res. Inc., San Jose, CA, USA
Abstract :
Copper is a promising candidate to replace aluminum for better conductivity, reliability as well as lower cost. A new electrochemical copper deposition (ECD) process has been developed for the manufacturing of ULSI damascened, or in-laid, Cu interconnects. The new Cu ECD process-is designed for filling trenches and vias with high aspect ratio (AR) conductor structures for 0.25 um device generation and beyond. The gap filling Cu deposition process is capable of high deposition rate and gives good material properties as well as good uniformity. The newly developed Cu ECD system has a standard cluster tool configuration. Its deposition modules have in-situ rinse/dry capability to achieve cassette to cassette dry wafer in and dry wafer out operations. Dual damascene structures with 0.4 um feature size and AR 5:1, which represents the most aggressive device structure being made today, have been completely filled without voids or seams. In addition, deep contact test structures with 0.25 um feature size and AR 8:1 have also been filled to demonstrate the capabilities of this new technology
Keywords :
ULSI; copper; electrodeposition; integrated circuit interconnections; integrated circuit reliability; metallic thin films; 0.25 mum; Cu; ULSI damascened Cu interconnects; ULSI multilevel copper interconnects; cassette dry wafer; conductivity; deep contact test structures; deposition modules; dual damascene structures; electro-chemical deposition technology; electrochemical copper deposition; filling; gap filling; high aspect ratio; high deposition rate; in-laid Cu interconnects; in-situ rinse/dry capability; reliability; standard cluster tool configuration; trenches; uniformity; vias; Aluminum; Conducting materials; Conductivity; Copper; Costs; Filling; Manufacturing processes; Material properties; Process design; Ultra large scale integration;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-4306-9
DOI :
10.1109/ICSICT.1998.785852