An investigation of single crystal Co-SALICIDE (self-aligned silicide) process for deep sub-micrometer CMOS devices

In this paper, the Co-SALICIDE process has been investigated intensively for the application to deep sub-micron CMOS VLSI. Adopting a Co/Ti/Si structure, epitaxial growth of a single crystal CoSi₂ film on the (100) Si substrate through two-step RTA has been demonstrated in detail. The heat-reaction characteristics of the Co/Ti/Si structure for forming the single crystal CoSi₂ film have been studied. We have applied the single crystal CoSi₂ to SALICIDE process post junction fabrication to obtain a smoother interface. Focusing on the disadvantage of a large leakage current that Co-salicided diodes usually suffer, ultra-shallow junctions especially, we found the leakage current to be large and investigated several methods to reduce diode leakage. The experiments show that PAI can improve the inverse I-V characteristics remarkably. A leakage current density of a Co-salicided diode as low as 8×10^-8 A/cm ² (V=5 v) was obtained for a junction depth of 107 nm. The resistivity of the single crystal CoSi₂ film is 16.5 μΩ_(BH)cm