Title :
SIBA: a VLSI systolic array chip for image processing
Author :
Patel, M. ; McCabe, P.A. ; Ranganathan, N.
Author_Institution :
Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
fDate :
30 Aug-3 Sep 1992
Abstract :
Describes the design and implementation of a two-dimensional systolic array processor for applications in image processing and computer vision. The processor architecture is based on a SIMD array of 4-bit processing elements, interconnected by a mesh network with four nearest neighbors. The PE array is programmable allowing the user to develop application-specific algorithms for performing analysis on image data. A prototype VLSI chip has been designed implementing a single PE and has been submitted for fabrication. The chip is expected to operate at 25 MHz
Keywords :
VLSI; image processing; systolic arrays; SIBA; VLSI systolic array chip; application-specific algorithms; computer vision; image data; image processing; processor architecture; Application software; Computer architecture; Computer vision; Data analysis; Image processing; Mesh networks; Nearest neighbor searches; Process design; Systolic arrays; Very large scale integration;
Conference_Titel :
Pattern Recognition, 1992. Vol. IV. Conference D: Architectures for Vision and Pattern Recognition, Proceedings., 11th IAPR International Conference on
Conference_Location :
The Hague
Print_ISBN :
0-8186-2925-8
DOI :
10.1109/ICPR.1992.202118
