Modeling of noise-induced jitter in low-power mixed-signal circuits using a SystemC highlevel description

This work describes the high-level modeling of the effects of noise for performance analyses in circuits and systems which are prone to errors. In order to allow for comprehensive studies, the modeling is based on a SystemC description because of its system level modeling capabilities and of its fine time granularity. The features offered by this approach are demonstrated by example of an ultra-low-power microelectronics circuit technology.