DocumentCode :
3064240
Title :
A fixed-point DSP implementation for a low bit rate vocoder
Author :
Yao, Fengying ; Li, Bizhou ; Zhang, Min
Author_Institution :
Inst. of Metall., Acad. Sinica, Shanghai, China
fYear :
1998
fDate :
1998
Firstpage :
365
Lastpage :
368
Abstract :
Fixed-point DSP implementation of the decoder and the synthesizer of a real time vocoder with 1.4 kbps bit rate has been accomplished instead of the usual realization of low bit rate vocoder in floating point DSP. Replacing floating point values with fixed-point ones and other approaches have been adopted to reach a real time solution. The implemented fixed-point decoder and synthesizer run at 11.3 MIPS on the average and occupy 1246 words of program memory, 1338 words of table ROM and 814 words of RAM in a 40 MHz TMS320C50 DSP chip. The results indicate the possibility to implement the whole vocoder with low cost fixed-point DSP
Keywords :
digital signal processing chips; fixed point arithmetic; speech coding; speech synthesis; telecommunication computing; vocoders; 11.3 MIPS; 40 MHz; Mandarin speech; RAM; TMS320C50 DSP chip; decoder; fixed-point DSP implementation; low bit rate vocoder; low cost; real time vocoder; synthesizer; table ROM; Bit rate; Costs; Decoding; Digital signal processing; Digital signal processing chips; Random access memory; Read only memory; Read-write memory; Synthesizers; Vocoders;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-4306-9
Type :
conf
DOI :
10.1109/ICSICT.1998.785897
Filename :
785897
Link To Document :
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