A hybrid architecture for a high performance and physical small low-level image processing system

Author

van Inge, A. ; Hertzberger, L.O.

Author_Institution

Dept. of Comput. Sci., Amsterdam Univ., Netherlands

fYear

1992

fDate

30 Aug-3 Sep 1992

Firstpage

70

Lastpage

74

Abstract

Deals with the hardware implementation of a low-level image processing unit for mobile autonomous systems. High processing performance and a small physical size of the sensor and processing unit are two important factors. The image processing unit described here combines between high system performance and flexibility. The emphasis for this design lies on two aspects, i.e. adapted processors, in this case SIMD processor-arrays, and guided data reduction by means of finding partial images

Keywords

computer vision; image processing equipment; mobile robots; SIMD processor-arrays; adapted processors; flexibility; guided data reduction; hardware implementation; high system performance; hybrid architecture; low-level image processing; mobile autonomous systems; mobile robots; partial images; Acoustic sensors; Communication system control; Computer architecture; Computer science; Control systems; Hardware; Image processing; Image sensors; Mobile computing; Sensor systems;

fLanguage

English

Publisher

ieee

Conference_Titel

Pattern Recognition, 1992. Vol. IV. Conference D: Architectures for Vision and Pattern Recognition, Proceedings., 11th IAPR International Conference on

Conference_Location

The Hague

Print_ISBN

0-8186-2925-8

Type

conf

DOI

10.1109/ICPR.1992.202132

Filename

202132