Study of affine image warping on a linear processing array

Several methods for parallel affine image warping on a linear processor array are considered. The methods were implemented on the Carnegie Mellon Warp machine and the Carnegie Mellon-Intel Corporation iWarp computer (treated as a linear array), and performance figures are provided. Both systolic methods, which feed one of the images in a stream, and non-systolic methods, which partition both images, are treated. A scanline method that combines some of the features of both, but which requires a fast transposed method is also described. The authors articulate three characteristics that affect the design of parallel image warping algorithms: affine warping is easily invertible, the mapping is known at the start of execution, and nearby input pixels map to nearby output pixels. The authors conclude that non-systolic methods give slightly better execution time and are easier to programs than systolic methods but require much larger processor memories