Title :
The comparison of delay modeling for basic interconnect net topologies
Author :
Lingling, Sun ; Xiaolang, Yan ; Junhu, Wang ; Miaohua, Cai
Author_Institution :
CAD Center, Hangzhou Univ., China
Abstract :
This paper makes an attempt to compare several methods of interconnect delay modelling. The results of different interconnect delay analyses are given and compared with SPICE simulation results for testing basic interconnect net topology
Keywords :
circuit analysis computing; delay estimation; distributed parameter networks; integrated circuit interconnections; integrated circuit modelling; iterative methods; linear network analysis; transfer functions; transmission line theory; delay modeling; interconnect net topologies; Circuit simulation; Circuit topology; Delay effects; Delay estimation; Integrated circuit interconnections; RLC circuits; Routing; SPICE; Testing; Very large scale integration;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-4306-9
DOI :
10.1109/ICSICT.1998.785923
