DocumentCode
3065826
Title
Address Sequences Generation for Multiple Run Memory Testing
Author
Yarmolik, S.V. ; Mrozek, I. ; Sokol, B.
Author_Institution
Belarusian State Univ. of Informatics & Radioel., Minsk
fYear
2007
fDate
28-30 June 2007
Firstpage
341
Lastpage
344
Abstract
This paper deals with address generation for multiple run memory tests. It presents the algorithms for address sequences generation and proposes the new method for address sequences generation. The experimental results with the proposed address sequence are also shown.
Keywords
binary sequences; storage management; testing; address sequences generation; binary sequence; multiple run memory testing; Binary sequences; Computer industry; Conference management; Counting circuits; Fault detection; Hardware; Informatics; Management information systems; Reflective binary codes; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Information Systems and Industrial Management Applications, 2007. CISIM '07. 6th International Conference on
Conference_Location
Minneapolis, MN
Print_ISBN
0-7695-2894-5
Type
conf
DOI
10.1109/CISIM.2007.9
Filename
4273545
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