DocumentCode :
3066024
Title :
An adaptive echo canceller using digital signal processor LSI chips
Author :
Ozawa, Kazunori ; Araseki, Takashi ; Itoh, Yasuo
Author_Institution :
NEC Corporation, Kawasaki, Japan
Volume :
8
fYear :
1983
fDate :
30407
Firstpage :
466
Lastpage :
469
Abstract :
This paper discusses a compact adaptive echo canceller with digital signal processor (SP) chips on the basis of a cascadable structure. By using this cascadable structure, tap number expansibility and program modification for satisfying various requirements can be easily obtained. Two kinds of echo cancellers were implemented. One for teleconference use, which has 600 taps with 12 SPs, has accomplished more than 20 dB echo cancellation in a conference room. It provides subjective high performance. The other, for telephone line use, with up to 300 taps, attains more than 30 dB echo return loss enhancement (ERLE). Each of these echo cancellers was implemented on a single board.
Keywords :
Costs; Digital signal processors; Echo cancellers; Laboratories; Large scale integration; National electric code; Signal processing; Teleconferencing; Telephony; Transversal filters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '83.
Type :
conf
DOI :
10.1109/ICASSP.1983.1172167
Filename :
1172167
Link To Document :
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