Title :
A case for a multitrace cluster
Author :
Wu, Yiu Cheong Simon ; Ling, John ; Helms, Ward J.
Author_Institution :
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Abstract :
The ability to place vast transistor count on a single chip offers designers to experiment with a new architecture. A new architecture alternatives, known as Mulitrace Cluster, is proposed to overcome the limits of circuit technology and microarchitecture
Keywords :
computer architecture; microprocessor chips; multitrace cluster architecture; single chip; superscalar processor; Computer aided software engineering; Decoding; Delay; Dynamic scheduling; Hardware; Integrated circuit technology; Microarchitecture; Microprocessors; Technological innovation; Transistors;
Conference_Titel :
VLSI Technology, Systems, and Applications, 1999. International Symposium on
Conference_Location :
Taipei
Print_ISBN :
0-7803-5620-9
DOI :
10.1109/VTSA.1999.785995
