DocumentCode
3067540
Title
Single row routing with indifference graphs on the DAP
Author
Chennapragada, D. ; Looges, P.J. ; Olariu, S.
Author_Institution
Dept. of Comput. Sci., Old Dominion Univ. Norfolk, VA, USA
fYear
1992
fDate
12-15 Apr 1992
Firstpage
137
Abstract
The distributed array of processors (DAP) is a commercially available massively parallel machine which is often applied to numerically intensive problems which exploit its matrix manipulation abilities. It is shown that the DAP can be efficiently used to solve non-numerical problems as well. Specifically, a heuristic solution to the well-known single row routing problem in a VLSI is proposed. Instances of this problem are modeled using a subclass of interval graphs, and it is shown that this approach leads to efficient algorithms. sequential and parallel. Both algorithms were implemented, the sequential providing a benchmark by which to measure the speed-up of the parallel implementation on the DAP 510
Keywords
VLSI; circuit layout CAD; graph theory; network routing; parallel algorithms; parallel machines; DAP; DAP 510; VLSI; distributed array of processors; heuristic solution; indifference graphs; interval graphs; massively parallel machine; matrix manipulation abilities; numerically intensive problems; parallel algorithms; sequential algorithms; single row routing problem; Circuits; Computer science; Digital audio players; Joining processes; Parallel machines; Routing; Transmission line matrix methods; Velocity measurement; Very large scale integration; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Southeastcon '92, Proceedings., IEEE
Conference_Location
Birmingham, AL
Print_ISBN
0-7803-0494-2
Type
conf
DOI
10.1109/SECON.1992.202323
Filename
202323
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