• DocumentCode
    3068146
  • Title

    A High-Speed, High-Radix, Processor Array Architecture for Real-Time Elliptic Curve Cryptography Over GF(2m)

  • Author

    Fayed, Mohamed A. ; El-Kharashi, M. Watheq ; Gebali, Fayez

  • Author_Institution
    Univ. of Victoria, Victoria
  • fYear
    2007
  • fDate
    15-18 Dec. 2007
  • Firstpage
    56
  • Lastpage
    61
  • Abstract
    This paper presents a high-radix elliptic curve cryptographic architecture that performs a scalar multiple of an elliptic curve point operations over GF(2m). The proposed architecture is based on a new algorithm, which is a modified version of the sliding window scalar multiplication algorithm. We speed-up the scalar multiplication by merging the point doubling and adding operations into a single step, which decreases the scalar multiplication critical path delay at the expense of a larger look-up table. The proposed architecture utilizes an optimized processor array-based field ALU that efficiently implements addition, squaring, multiplication and division over GF(2m). The proposed architecture is implemented for m epsiv {163, 283, 571} on a Xilinx XC4VFX100-12 device. We achieved a frequency of 253 MHz, which allows the architecture to calculate GF(2163) scalar multiplication for radix 28 in 9 mus. Our results for GF(2163) show a speed-up that ranges from 1.5 to 326 in comparison to previous FPGA implementations and a speed-up ranges from 1.1 to 5.6 in comparison to previous ASIC implementations.
  • Keywords
    Galois fields; digital arithmetic; field programmable gate arrays; microprocessor chips; parallel architectures; public key cryptography; table lookup; ASIC implementation; FPGA implementation; Galois field; Xilinx XC4VFX100-12 device; elliptic curve point operation; high-speed high-radix elliptic curve cryptographic processor array architecture; look-up table; processor array-based field ALU; public key cryptosystem; real-time elliptic curve cryptography; sliding window scalar multiplication algorithm; Algorithm design and analysis; Application specific integrated circuits; Delay; Elliptic curve cryptography; Elliptic curves; Field programmable gate arrays; Hardware; Public key cryptography; Signal processing algorithms; Throughput; ALU design; Elliptic Curve Cryptography (ECC); processor array; public key cryptosystems; scalar multiplication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing and Information Technology, 2007 IEEE International Symposium on
  • Conference_Location
    Giza
  • Print_ISBN
    978-1-4244-1835-0
  • Electronic_ISBN
    978-1-4244-1835-0
  • Type

    conf

  • DOI
    10.1109/ISSPIT.2007.4458014
  • Filename
    4458014