DocumentCode
3068422
Title
Automatic fault isolation techniques for digital systems
Author
Ma, Hede ; Liu, Ying
Author_Institution
Savannah State Coll., GA, USA
fYear
1992
fDate
12-15 Apr 1992
Firstpage
335
Abstract
An automatic fault isolation technique to minimize fault isolation cost in digital systems is presented. Since the technique is implemented by additional hardware design instead of traditional software diagnostic procedures, the computation time and memory space required for fault isolation are eliminated. Two algorithms are developed, which specify the implementation of the design of the automatic fault isolation in terms of online or offline error detection, respectively. Based on the automatic fault isolation technique, highly available digital systems can be obtained since faults are isolated right after they are detected avoiding usual waiting time for fault isolation. Therefore, the recovery process can be executed as soon as possible. This technique has the ability to isolate intermittent faults while an online testing scheme is adopted in digital systems. The hardware overhead of the automatic fault isolation design is about 2% depending on digital system structures
Keywords
circuit analysis computing; digital integrated circuits; fault location; integrated circuit testing; logic testing; automatic fault isolation; digital systems; hardware design; intermittent faults; offline error detection; online error detection; online testing; recovery process; Circuit faults; Circuit testing; Computer science; Costs; Digital systems; Educational institutions; Fault detection; Hardware; Manufacturing; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Southeastcon '92, Proceedings., IEEE
Conference_Location
Birmingham, AL
Print_ISBN
0-7803-0494-2
Type
conf
DOI
10.1109/SECON.1992.202364
Filename
202364
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